RESUME

Srinivas P. Tirumala
2868 Homestead Rd., Santa Clara, CA 95051
Tel: (408) 241 7448
Email: srinivastp@hotmail.com

Last Updated: 28th August 99

OBJECTIVE:	Process Engineering Manager in Semiconductor Industry.
EXPERIENCE:	(click here for details)
Project Manager (Process Integration)	Telcom Semiconductor, Mountain View, CA Project Manager - Sub-micron foundry processing Foundry Process Engineer Process Development Engineer Process Engineer - sustaining and development Process Integration and Miscellaneous Projects at TelCom	10/98 - current 06/98 - 10/98 04/97 - 06/98 07/96 - 04/97 --
Project Associate:	Oak Ridge National Laboratory, Oak Ridge, TN	06/95 - 01/96
Research Assistant:	University of Houston, Houston, TX	08/94 - 06/96
Research Assistant:	Indian Institute of Technology, Madras	09/93 - 05/94

SKILLS:

Poject management skills required to support manufacturing both in Fabless and Fab environments
Technical skills required to understand manufacturing processes in semiconductor fabs. Click here for details.

COMPUTING SKILLS:

Platforms worked on: Windows-95 and NT-4.0, Mac, UNIX
Applications: Access-97, Word, Excel, Power-point, FrontPage, MS-Outlook, RS1
Programming: VHDL, RPL and HTML (https://srinivastp.tripod.com/) & Intro to Pascal and C

EDUCATION:

M.B.A.	Santa Clara University, Santa Clara, CA.	GPA: NA	May 2002
M.S. Materials Eng.	University of Houston, Houston, TX.	GPA: 3.8 / 4.0	May 1996
B.Tech. Materials. Eng.	I.I.T. Madras, India	GPA: 3.6 / 4.0	May 1994
Classes in Electrical. Eng.	UC Berkeley (Extension), CA	GPA: 3.6 / 4.0	1998/99

COURSE WORK: Click here to view the detail for relevant coursework

PUBLICATIONS: