Srinivas P. Tirumala
2868 Homestead Rd., Santa Clara, CA 95051
Tel: (408) 241 7448
Email: srinivastp@hotmail.com
This page decribes various projects in detail. Go back to the Resume for other information
Project Manager - Sub-micron
foundry processing: 10/98 - current
- Identify and qualify foundry services in Asia and U.S.A for manufacturing TelCom's
Integrated Circuits.
- Monitor and improve manufacturing aspects like cost, cycle time, and quality.
- Supervise the foundry engineering team
Foundry Process Engineer: 06/98 -
10/98
- Member of new product development team: Responsible for coordinating processing of
all new products by interacting with ASIC foundry vendors.
- Foundry Qualification: Responsible for process qualification for TelCom's products
requiring 0.6 mm & 1.5 mm CMOS
processes at ASIC Foundries
- Involved in defining and auditing TelCom's quality requirements at Foundries
Process Development Engineer - TelCom's Mountain View
Facility: 04/97 - 06/98
- BiPolar Process: Developed an isolation scheme and new bipolar process flow
resulting in over 50% manufacturing cost reductions. Extensive process characterization
was performed.
- BiCMOS Process: Headed efforts in developing a new process capability
- Dual Metal Process: Developed second layer metallization process working with in a team
of four engineers
Process Engineer - sustaining and development:
07/96 - 04/97:
- Supported production in photo and etch processes: Bake, Spin, Align, Develop,
Dry/Wet etch, Resist Strip.
- Qualified vendors for various substrates and services
- Created, modified and maintained various specifications and procedures
- Documented all process flows
- Developed and qualified deep UV bake for positive resists on Fusion photostabilizer
- Characterized epitaxial pattern shift for all BiPolar processes
Process Integration and Miscellaneous
Projects at TelCom:
- Projection Aligners: Developed projection alignment capability and converted production
over to projection aligners from proximity aligners
- Facilitator between process, product, test, and quality engineering departments
- SPC Implementation: Created a custom database with user friendly interface and security
features for multi-user environment. It is being used to gather and chart inline process
data for the purposes of SPC implementation and process capability monitoring. This
resulted in direct savings of about $200,000 by preventing the company from purchasing
expensive software to perform these tasks.
- Web Page Development: Designed process engineering department web page(s). Responsible
for maintaining and updating its contents.
- Gate ox integrity: Participated in gate ox integrity improvement team activities.
- Developed and implemented test limits for Electrical Test Parameters
- Contamination control: Active member of a task force responsible for identifying and
containing the contamination issue which had devastating effects on the overall fab yields